This invention relates to transistors, and more particularly to III-nitride type transistors.
Gallium nitride (GaN) semiconductor devices, which are III-V or III-nitride type devices, are emerging as an attractive candidate for power semiconductor devices because the GaN devices are capable of carrying large currents and supporting high voltages. Such devices are also able to provide very low on-resistance and fast switching times. A high electron mobility transistor (HEMT) is one type power semiconductor device that can be fabricated based on GaN materials. As used herein, GaN materials that are suitable for transistors can include binary, tertiary, or quaternary materials, which are based on varying the relative amounts of group III elements Al, In, and Ga, in AlxInyGa1-x-yN, such that 0≦x≦1, 0≦y≦1, and 0≦1-x-y≦1. Further, GaN materials can include various polarities of AlInGaN, such as Ga-polar, N-polar, semi-polar or non-polar.
Referring to FIG. 1, a field effect transistor (FET), e.g., a GaN HEMT device, can include a III-nitride semiconductor body with at least two III-nitride layers formed thereon. The material which forms III-nitride layer 12, which for example may be AlGaN, has a larger bandgap than that which forms buffer layer 11, which may be GaN. The polarization field that results from the different materials in the adjacent III-nitride layers induces a conductive two dimensional electron gas (2DEG) region near the junction 9 of the two layers, specifically in the layer with the narrower band gap. The 2DEG region is shown throughout the figures as a dashed line. One of the layers through which current is conducted is the channel layer. Herein, the narrower band gap layer in which the current carrying channel, or the 2DEG is located is referred to as the channel layer. The device also includes a schottky gate electrode 18 and ohmic source and drain electrodes 16, 17 on either side of the gate electrode 18. The region between the gate and drain and the gate and source, which allows for current to be conducted through the device, is the access region 7. The region below the gate electrode 18 is the gate region 6.
FIG. 1 shows a typical standard AlGaN/GaN HEMT structure, which could be designed to have a threshold voltage of −3V. Layer 10 is a substrate, such as of SiC, sapphire, Si, or GaN, layer 11 is a GaN buffer, and layer 12 is AlGaN, with 20% Al composition as an example (Al0.2Ga0.8N). Layers 11 and 12 are both Ga-face material. The dashed line represents the two-dimensional electron gas (2DEG) present in this structure. A negative gate voltage is required to deplete the 2DEG under the gate and thereby turn the device off.
The gate electrode 18 modulates the 2DEG underneath the gate contact. Standard AlGaN/GaN HEMTs, such as the one shown in FIG. 1, and related devices are typically normally on (i.e., depletion mode devices), and therefore can conduct current at 0 gate voltage. A depletion mode device requires a conducting channel in both the gate region and access regions when 0V is applied to the gate. It can be desirable in power electronics to have normally off devices (i.e., enhancement mode devices) that do not conduct at 0 gate voltage to avoid damage to the devices or other circuit components by preventing any accidental turn on of the device.